Coverage Analysis in the Verification of 8B/10B Encoder
Prateek Kumar Jana, Debiprasad Priyabrata Acharya · 2011
The Verification is a vital step of any ASIC development process. 8B/10B encoder is a very widely used block in communication systems. The RTL code of an 8B/10B encoder is simulated in Questasim environment. The 8B/10B encoder is put to formal verification process in this work. Coverage analysis gives a view of the efficiency of the code. The report of coverage analysis of 8B/10B encoder is presented in this work. General Terms ASIC development process, Coverage analysis