A Method to Search Fallible Branch in FPGA Programs
Haixu Li, Yunyi Yan, Baolong Guo · 2015
This paper discusses about a method to find the fallible branch in FPGA programs using VHDL, the method includes finding the topological relation between entities using VHDL grammar, modeling the topological relation into a distance matrix and finding the shortest route using ACO. The shortest route is the fallible branch.