Runtime reconfigurable platform for embedded systems
Baskaran Krishnamoorthy · 2005
Reconfigurable computing combines the benefits of both software and reconfigurable hardware implementations.The use of FPGA in reconfigurable computing is becoming increasingly prevalent due to its ever-increasing density and rapid turn around time.There is a growing need to maximize the utilization of FPGA resources with the help of a framework for runtime reconfigurable platforms in an attempt to reduce cost and power consumption.Another development branch leads to dynamically reconfigurable FPGAs, which allows certain areas within the FPGA to be reconfigured while the rest continues to run unaffected.In this research work, we have examined research issues and technology approaches for dynamic reconfigurable platforms based on an in-depth survey of previous research work.We have proposed a number of optimal algorithms for both initial and run-time partitioning of the FPGA, scheduling and placement of tasks in the reconfigurable hardware.We show that the proposed partitioning techniques are superior to existing ones reported in the literature.The effectiveness of these techniques was evaluated using the first come first serve (FCFS) policy for implementing both the scheduling and placement operations.Our investigations show that a reduction of up to 17% in terms of execution time, up to 20% in response time, up to 30% in configuration delay, and up to 24% in configuration power is achievable as a direct result of incorporating the partitioning schemes.Two other non-preemptive algorithms, namely shortest job first (SJF) and priority based scheduling are also implemented and fully evaluated to ..