"All-in-C" Behavioral Synthesis and Verification with CyberWorkBench From C to Tape-Out with No Pain and A Lot of Gain
Kazutoshi Wakabayashi, Benjamin Carrión Schäfer · 2008
This chapter introduces the benefits of C language-based behavioral syn- thesis design methodology over traditional RTL-based methods for System LSI, or SoC designs. A comprehensive C-based tool flow, based on CyberWorkBench TM (CWB), developed during the last 20 years at NEC's R&D laboratories is intro- duced. This includes behavioral synthesis and formal verification and hardware- software co-simulation of entire complex SoC. First we introduce the all-in-C concept based on CWB. Then we discuss the behavioral synthesis for various types of circuits and exam- ine the advantages of behavioral synthesis on the hand of commercial ICs. We show that currently entire SoCs are created using this flow in a fraction of the time taken by traditional approaches. Behavioral IP and C-based configurable processor synthesis and automatic archi- tecture exploration is explained next. At the end we demonstrate a real world example of a mobile phone SoC where most of the modules are synthesized from C descriptions using CWB.