23.7 A 16Gb/s 1 IIR + 1 DT DFE compensating 28dB loss with edge-based adaptation converging in 5µs
Shayan Shahramian, Behzad Dehlaghi, Anthony Chan Carusone · 2016
I/O receivers routinely equalize ISI over 10 or more post-cursor UI. IIR DFEs are a low-power technique for canceling long post-cursor ISI tails, and have been demonstrated compensating over 20dB loss at fbit/2 up to 10Gb/s [1-5]. Equalizer adaptation is required to maintain signal integrity in time-varying channel and circuit conditions. Robust adaptation algorithms suitable for discrete-time (DT) DFEs are well-established, but there are few examples of adaptive algorithms for IIR DFEs [2,4], each exhibiting relatively slow convergence, additional high-bandwidth hardware and/or requiring the input data statistics to meet specific criteria. In this work, a 16Gb/s IIR DFE is integrated into a CDR, and the adaptation algorithm makes use of signals available in a regular binary phase detector (PD) to simultaneously adapt the IIR and DT taps. The novel algorithm provides faster and more robust convergence than has been previously demonstrated for IIR DFEs.