Systolic arrays for high performance digital signal processing
John V McCanny, Roger Woods, Ming Gao Yan · Institution of Engineering and Technology eBooks · 1990
In this chapter attention has been focused mainly on research undertaken by the author and his colleagues. Considerable effort has also been devoted in many other laboratories world-wide on research on VLSI array processor architectures which are pipelined at the bit level and suitable for high performance DSP chip design. Quite a number of these architectures have been used as the basis of chip designs. Further information on these designs are available from a number of sources.