A methodology for the synthesis of custom multiprocessors
Michelle Dolore Kidwell · 1992
Previous design tools made it possible to automatically design systolic array structures from very simple descriptions of circuit behavior. Other design tools took complex circuit behavior descriptions as input, and produced the design of a single, application specific processor. Our methodology extends both approaches: it will accept complex circuit behavior descriptions and produce the design of a multiprocessor system that will behave as described. The Multiprocessor Synthesis Methodology proposed here (MSM) offers greater design flexibility than its predecessors while satisfying both necessary and sufficient conditions for mapping correctness. The methodology may be used to design systems incorporating linear arrays of processors, processor meshes, or hypercubes. The behavioral description may contain decision structures or loops nested to any depth. The chosen multiprocessor structure can be optimized within user specified constraints, such as, the level of granularity of the parallelism, the degree of processor structure interconnection, the maximum number of processors, or the degree of processor complexity. Communication control within the processor structures is fully specified, and communication hardware is designed automatically. MSM builds on previous work by Moldovan and Fortes (15) (16) (17), by Raj and Lin (23) (24) (25), and by Raj and Kidwell (8). Moldovan's and Fortes' work explored methods of using transformation functions to map numerical application algorithms into systolic arrays. Raj's and Lin's work incorporates techniques from the former studies into a system that maps an algorithmic behavioral description with a maximum nested loop depth of three into a multiprocessor system and then specifies the microarchitecture of each processor. Raj's and Kidwell's work allowed loop nesting to any depth, and allowed user specified constraints and limitations to be input.