Transactional level modeling of a serial communication system
John D. Chaparro · ThinkTech (Texas Tech University) · 2006
Transaction level modeling is an effective tool to explore semiconductor system behavior. It can be used to describe digital Systems on a Chip (SoC), or even the communications between multiple SoC. This thesis examines the use of transaction level modeling to describe a serial communication system used between two SoCs in order to model the traffic between the two devices. The communication systems that are examined in particular is for a Serial RapidIO-based system. This document will go over some information concerning TLM design, followed by a short introduction into Serial RapidIO. It will then discuss the design of the system, starting with a top level view of the system, and broken down into discussions for each system module. It will then cover the method used to measure the throughput of the model and discuss the results as compared to the behavior of the RTL of the modeled system behaved.