Computer Performance Prediction of a Data Flow Architecture.
Daivd John Hogen · Defense Technical Information Center (DTIC) · 1981
Supercomputers capable of performing extremely high speed computation have been proposed which are based on an architecture known as data flow. Application of a Petri net-based methodology is used to evaluate the performance attainable by such an architecture. The architecture evaluated is MIT's cell block data flow architecture which is being developed to execute the applicative programming language VAL. Results show that for the data flow architecture to achieve its goal of high speed computation, intelligent multiprogamming schemes need to be developed. One such scheme, based on the notion of a 'concurrency vector', is introduced. (Author)