Modeling and performance evaluation of generic fast packet switches
Jeane Shu-Chun Chen · 1991
A space-domain, nonblocking fast packet switch is generically modeled as having both input and output queueing and a speedup factor of $C$, 1 $\le$ $C$ $\le$ $N$, $N$ being the size of the switch. The speedup factor of $C$ enables up to $C$ packets to be delivered to the same output port simultaneously. This model describes the family of space-domain switches in a unified way and provides a premise for studying performance trade-offs between certain design parameters. The analysis derives maximum achievable throughput and total system delay for this system with varying degrees of speedup. It also obtains the queue length distributions for both the input and output queues and derives an estimate of packet blocking probability for a finite buffer system. For a fixed buffer budget, the analysis determines an optimal buffer allocation strategy yielding a minimum blocking probability. This model is also extended to study the impact of traffic imbalance on maximum switch throughput. Modeling of the output queues of time-domain packet switches has been largely overlooked. We present a Markov-modulated flow model to study this system. This model accounts for the finite switching and transmission time as well as dependency among arrival streams at different output ports. Queue content distributions are obtained for both the infinite and finite buffer systems and full buffer probability is also provided for the latter system. Numerical examples and comparisons with the results of an M/M/1 approximation are presented. The impact of using two priority classes to support integrated traffic in an input-queueing space-domain switch is investigated. In the first policy, packets of both priority classes are queued when waiting for service. In the second policy, only low priority packets are queued and high priority packets not delivered at first attempt are dropped from the system. The analysis presents an equivalent queueing system to study the low priority class, accounting for the service dependency imposed by the switch structure and the presence of the high priority class. Using this approach, expressions for the queue length distribution, as well as estimates for blocking probability of finite buffer systems, are obtained. (Abstract shortened with permission of author.)