Evaluation of Introducing Multiple Time-multiplexing Degrees to Inter-FPGA Connections on Multi-FPGA Systems
Masato Inagi, Yasuhiro Takashima, Yuichi Nakamura · ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications · 2009
In this paper, we deal with the optimization of inter-FPGA connections on multi-FPGA systems. To verify the logic functions of a huge circuit on a multi-FPGA system, the target circuit is often partitioned into sub-circuits to fit the capacity of an FPGA of the multi-FPGA system. In such cases, the number of signals between FPGAs tends to exceed the number of wires between FPGAs. To accommodate the inter-FPGA signals, time-multiplexed (TM) wire technique has been introduced into multi-FPGA systems. In this paper, we evaluate the effectiveness of introducing multiple time-multiplexing degrees to TM wires. We simultaneously use more than two types of TM wires each of which has a different time-multiplexing degree. In the experiment, we confirmed that time-multiplexing with multiple time-multiplexing degrees outperforms the one with a single time-multiplexing degree.