A Design of 16×16-bit Redundant Binary MAC Using 0.25㎛ CMOS Technology
Tae-Min Kim, Gun-Soon Shin · The Journal of the Korean Institute of Information and Communication Engineering · 2003
In this paper, a 1616-bit Multiplier and Accumulator (MAC) is designed using a Redundant Binary Adder (RBA) circuit so that it can make a fast addition of the Redundant Binary Partial Products (RB_PP's) by using Wallace-tree structure. Because a RBA adds two RB numbers, it acts as a 4-2 compressor, which reduces four inputs to two output signals. We propose a method to convert the Redundant Binary (RB) representation into the 2's complement binary representation. Instead of using the conventional full adders, a more efficient RB number to binary number converter can be designed with new conversion method.