Evaluating ASUS P4SGX-MX ATX Motherboards for the BART Project
Ana M. Pavlicic, Thuy Thi Thu Nguyen · Swinburne figshare (Swinburne University of Technology) · 2003
This technical report outlines the results obtained from testing a new BART project PC containing an ASUS P4SGX-MX ATX Motherboard. Several PCs are to be used in the BART project to simulate home users sending and receiving traffic across an ISP network. Tcpdump on the PC was used to capture packets and the time stamping of the packets investigated in this report. This technical report uses a similar setup and testing method as Mark Pozzobon's evaluation of CAIA laboratory computers. The aim of the investigation was to find the optimal configuration for Ethernet interfaces so as to obtain the most accurate time stamp results. The optimal configuration involved manually setting the line speed on the interface. The addition of another NIC and its time stamp accuracy was also investigated. The optimal configuration for the off-board PCI Ethernet card involved manually configuring link speeds on both interfaces and connecting the unused interface to an active Ethernet link so that a carrier is present.