Development of a Multi-Channel Processing Matched Filter Using FPGA for CDMA-QAM Method
Hiroshi Mochizuki, Sei Takahashi, Hideo Nakamura, S. Nishida, Ryo Ishikawa · ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications · 2009
At present, we attempt to apply our proposed CDMA-QAM method to railway signaling, and evaluate basic characteristics using computer simulation. In this paper, we describe development of a multichannel processing matched lter as a CDMA receiver. We noted that Walsh code is 1 or -1, and proposed the design that has no multipliers. In addition, we applied some techniques such as time-sharing processing, and optimized the design to reduce number of logic elements that an FPGA has. As a result, we show that we could implement the multi-channel processing matched lter in an FPGA.