BIST structure based on new Random Access Scan architecture for Low Power Scan Test
Yong‐Hyun Kim, In-Soo Kim, Hyoung Bok Min · ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications · 2009
Existing serial scan-based BIST(Built-In Self-Test) structure causes such problems as high test power dissipation and long test application time due to serial shifting characteristics with regard to testing. The high switching activity might cause a potential damage to circuits and reduce credibility and yield of circuits. In order to resolve the problems, we propose a new RAS(Random Access Scan) architecture-based BIST structure. The structure does not implement serial shifting, so test application time and Flip-Flops switching activity are reduced. In addition, since it is BIST structure, an effective test can be realized without auxiliary test equipment. According to experimental results on ITC99 and ISCAS89, switching activity is reduced by 34.99% on average in the suggested structure compared to the serial scan architecture BIST structure.