A Processor With Dynamically Reconfigurable Circuit For Floating-Point Arithmetic
Yukinari Minagi, Akinori Kanasugi · Zenodo (CERN European Organization for Nuclear Research) · 2010
This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.