A new VLSI architecture for image data rate discrete cosine transform processor
S. M. Rezaul Hasan · 1st IASTED International Symposium on Signal Processing and its Applications · 1987
The Discrete Cosine Transform (DCT) [1] is presently the best known transform image encoder that performs closest to the theoretically optimal karhunen-loeve transform [1]. The kernel of DCT has both periodicity and symmetry properties. The most efficient DCT implementation todate is due to B.G.Lee [2]. His Fast Cosine Transform algorithm [2] is based on a decimation in time scheme resulting in butterfly structural units with some similarity to Fast Fourier Transform [FFT]. In this paper [3] a new approach of direct sample by sample DCT has been adopted. Using distributed arithmetic [4] multipliers has been replaced by adders, and the memory requirements has been significantly reduced by exploiting the symmetry and periodicity of the DCT kernel.