Design of a Parallel Computer Network Interface Controller
Sung Gu Lee · Journal of Electrical Engineering and Information Science · 1997
This paper describes the design of a network interface controller (NIC) chip which is to be used to support a novel adaptive virtual cut-through routing method for parallel computer systems with direct (i.e., point-to-point) interconnection networks. The NIC chip is designed to provide the interface between a processing node constructed from commercially available microprocessors and another custom-designed router chip, which in turn performs the actual routing of packets to their respective destinations. The NIC, designed using a semi-full-custom VLSI design technique, implements a new adaptive virtual cut-through routing method (presented in an earlier paper) which has been shown to significantly outperform traditional wormhole routing with a minimal amount of hardware overhead. The NIC design has been fully simulated and laid out using a 0.8 ㎛ CMOS process.