Internet authentication of LUT-based FPGA configuration files
Dylan Carline, Paul Coulton · 2002
With the use of reconfigurable Look Up Table (LUT) based Field Programmable Gate Arrays (FPGAs) in internet-based environments, with multiple design authorities; the problem of design authentication becomes a crucial element for secure operation. Previous schemes used to discourage piracy have centred on the alteration of the FPGA design to define their origin. This process is particularly cumbersome when designs are created from a multiple designer base or are iteratively updated from different sources, as proposed in the Internet Reconfigurable Logic (IRL) system by Xilinx®. Embedding data within the padding bits of an FPGA configuration file [1] enables important information regarding the history of a particular design to be stored and provides a method for FPGA design-file authentication without the necessity of design modification.