Design of Control Block for Passive UHF RFID Tag IC
Jae-Eun Lee, Cheol-Jong Woo, Sang-Rok Cha, Sang-Jo Seo, Bong-Jo Shin, Min-Seop Kang, Keun-Hyung Park, Ho‐Yong Choi · ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications · 2007
In this paper, we design a control block of the passive UHF RFID tag IC according to EPCglobal Class-1 Generation-2 UHF RFID 1.1.0 Protocol. The control block includes a PIE (Pulse Interval Encoding) block, CRC5/CRC16 blocks, a Slot Counter block, a Random Number Generator block, a Main Control block, an Encoder block, and a Memory Interface block. The control block has been designed using the Verilog HDL. Functional simulation results show that operations including 11 instructions with 7 states are performed correctly.