A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology
Mario Sako, Yoshihisa Watanabe, Takao Nakajima, Jumpei Sato, Muraoka Kazuyoshi, M. Fujiu, Fumihiro Kono, M. Nakagawa, Masami MASUDA, Koji Kato, Terada Yuri, Yuki Shimizu, Mitsuaki Honma, Akihiro Imamoto, Tomoko Araya, Hayato Konno, Takuya Okanaga, Tomofumi Fujimura, Xiaoqing Wang, Mai Muramoto · IEEE Journal of Solid-State Circuits · 2015
A 75 mm2low power 64 Gb MLC NAND flash memory capable of 30 MB/s program throughput and 533 MB/s data transfer rate at 1.8 V supply voltage is developed in 15 nm CMOS technology. 36% power reduction from 3.3 V design is achieved by a new pumping scheme. New low current peak features reduce a multi-die concurrent programming peak by 65% for 4-die case, and an erase verifying peak by 40%, respectively. Nanoscale transistors reducing bit-line discharge time by 70% is introduced to improve performance.