A Multithreaded Processor Architecture for SDR
John Glossner, Tanuj Raja, Erdem Hokenek, Mayan Moudgill · 한국통신학회지(정보와통신) · 2002
In this paper we discuss a multithreaded baseband processor capable of executing all physical layer processing of high data rate communications systems completely in software. We discuss the enabling technology for a software defined radio approach and present results for GPRS, 802.11b, and 2Mbps WCDMA. All of these protocols can be executed in real-time on the SB9600 chip using the Sandblaster core.