Latency- and Hazard-Free Volume Memory Ar chitecture for Direct Volume Rendering
Martijn de Boer, Alexander Gröpl, Jürgen Hesser, Reinhard Männer · 1996
The computational power required for direct volume rendering like ray-casting or volume ray-tracing can be provided by high speed rendering architectures. However the increasing proces sor speed makes a performance bottleneck obvious - the vol ume memory. This paper describes a volume memory architec ture that achieves at least a tenfold speed-up in read-out rate with moderate additional hardware. It has been simulated suc cessfully. A multi-level cache system is used with software prefetching and latency hiding. Pre- and postcaches addi tionally speed up the read-out rate so that a 5123 data set stored in a single memory module can be rendered at 3.125 Hz.