Testability structure for mixed-signal boards
B.R. Wilkins, Bambang Sunaryo Suparjo · 1993
A testability structure that provides facilities for the application of interconnect test on mixed-signal boards is at present under development by a Standardisation Working Group. This structure includes two analogue busses within the chip, which could be supplied externally through dedicated pins. The present paper describes a method of providing the same functions but without the pin overhead. Results obtained from prototype implementations are described. >