On Signal Processor System Design
Warren Marwood, AP Clarke · 1987
This paper contains an outline of a technique of 'system compilation' for the design of compact signal processing systems with computational capacities approaching 100 gigaflops. It is proposed that transputer nodes in a distributed array be provided with gigaflop capacity coprocessors to implement a set of defined signal processing primitives. Estimates are given for achievable coprocessor size and performance using a 1.5 micron double metal CMOS process. It is further proposed that transputer code for the array be generated automatically in the concurrent programming language OCCAM from a digraph representation of the algorithm. Process precedences which determine this digraph are extracted from a sequential algorithm description provided by the system designer.