A suitable NoC switch for on-line routing fault detection
Cédric Killian, Camel Tanougast, F. Monteiro, A. Dandache · 2011
In this paper we present an alternate Network-on-Chip switch incorporating a new on-line routing error detection technique. This router implements an adaptive routing algorithm suitable for MPSoC architectures in which dynamic and partial reconfiguration is allowed. The originality of the detection mechanism resides in the capacity to distinguish routing errors from adaptive decisions (to bypass faulty or reconfigurable areas). Moreover, the mechanism is able to detect the failing directions in the faulty switches allowing to not disconnect the entire faulty router. Here, we present the new proposed RTL router architecture with the corresponding error detection algorithm, several study cases being detailed. The implementation results clearly show the pertinence of the approach, an effective tradeoff between hardware overhead and failure detection capacity being reached in this new reconfigurable NoC.