Implementation of Clock Network Based on Clock Mesh
Xin He, Xu Huang, Yujing Li · 2015
Clock network synthesis is an important part of digital integrate circuit design.For the purpose of further reducing the effect of clock skew and On-chip Variation, this paper realized a clock mesh structure by using Encounter EDI tool basing on traditional clock tree synthesis.Experiment results validated the advantage of clock mesh in clock skew optimizing and On-chip Variation.