L Performance Models to Algorithm Partitioning TOOIS
Priya Balasubramanian, F.G. Gray · 1997
Performance modeling is wideij used to eficiently and rapidly assess the abiliity of multiprocessor architectures to effectively execute a given algorithm. In a itypicul design environment, VHDL perjormance models of hardware components are interconnected to form structural models of the target multiprocessor architectures. Algorithm features are described in application spec$c tools. Other automated tools partition the sojiiare among the various processors. Performance models evaluate the system performance. Several iterations may be needed before a suitable configuration is obtained. This paper describes a set of tools that directly interface the VHDL perfonname models to the algorithm partitioning tools, which will significantly reduce the time and effort needed to prepare the various models. A methodology that integrates several commercial tools is provided.