A 4 Mbit NAND-EEPROM
Shimpei Yoshioka, Kazuo Konishi, Kojh Maruyamal, Minoru Sasakil, Setsuo Terasaki · 1992
A memory card for a digital still camera using 4 Mbit NAND-EEPROMs(+l). compatible with SRAM(*2) memory card, has been developed. The new card can store a large amount of image data at low cost, without a battery back-up. This card incorporates newly developed 4 Mbit NAND-EEPROMs. a microprocessor. and a custom designed gate array. The new techniques are as follows: (1) Complete NAND-EEPROM writing control can be executed within the card without burdening the host. (2) The card utilizes a byte-writable EEPROM to realize byte-writing for the header data. (3) A block substitution method has been newly developed to recover local cell error. Error recovery can be self-completely executed with the built-in microprocessor. (4) An automatic erasing process has been developed to reduce the apparent writing time (0.2 sec per 0.8 Mbit).