An Efficient Register Allocation for a
Francisco P. Ku, Ying Shan Cheung, Prolog Compilation · 1990
In this paper, 13.e outline our experiment on NAP1 based compiler technologp. In preparation for a self-configured Prolog system un a multiple-node Transputer neti\.ork, a sequential Prolog compiler is needed as a test bed. The compiler generates intermediate Warren A hstract klachine codes, enhancing both the efficiency and poi.tabilit.?. Another festtrre employed bz the compiler is an efficienl register allocation mechanism. In intewsLing property of the Warren