Survey of Existing Tools for Formal Verification
Sandia National Laboratories (SNL-CA), Livermore, CA (United States), Robert Armstrong, USDOE Assistant Secretary for Human Resources and Administration, Ratish J. Punnoose, Matthew H. Wong, Jackson R. Mayo · 2014
Formal methods have come into wide use because of their effectiveness in verifying "safety and security" requirements of digital systems; a set of requirements for which testing is mostly ineffective. Formal methods are routinely used in the design and verification of high-consequence digital systems in industry. This report outlines our work in assessing the capabilities of commercial and open source formal tools and the ways in which they can be leveraged in digital design workflows.