Investigating opportunities for hardware realization of transfer functions
Krasimira Filipova, V. V. Yan'kov, Filip Filipov, Yordan Kralev, Dimov Ts. · 2011
In the paper we use a model of real-world process, represented with well-posed transfer function (TF) - W(p). It is used to build a Simulink model of the process. It was necessary the TF to be discretized with appropriately chosen sample time T0 and discretization method. As a result we get a dis- crete transfer function W(z). These two models, described with respective TFs, are simulated in Simulink, and after that we estimate their functional nearness. For generation of hardware description in HDL for the model it's used Simulink HDL coder toolbox. It contains a library of Simulink blocks, which have cor- responding HDL representation. To use that library, we represent discretized TF in canonical form (a graph of sum and gain operations and unit-delays). From resulting Simulink scheme, automatically is generated a VHDL and testbench code. To verify the correspondence between generated code and the functionality described with Simulink model, the testbench code is simulated in integrated environment Xilinx ISE Design Suite. There the values of each signal with time can be visualized. The next stage is implementation of generated code in Xilinx environment.