THPM 14.7 Architecture Design of MPEG-2 Decoder System
Yung-Pin Lee, Liang‐Gee Chen, Chung-Wei Ku · 1995
An architecture for the VLSI Design of MPEG-2 video decoder is introduced to achieve the MPQML (Main Profile, Main Level)[l]. Hardware complexity is analyzed, and decoding unit (VLD, IQ, IDCT, MC, etc.) is designed to reach the required performance.