IMPLEMENTATION OF SYSTOLIC/WAVEFRONT DIGITAL SIGNAL PROCESSORS* PROCESSOR ARRAYS USING SINGLE-CHIP
K.H. Yu, Yu Hen Hu · 1990
In this paper, we propose exploiting the high computational power and programmability of commercial single-chip digital signal processors to implement systolic/wavefront arrays. We view systolic/wavefkont arrays as special cases of general purpose multiprocessing arrays and propose interconnection hardware which facilitates autonomous data/control communication. A prototype of a wavefront array utilizing 4 TMS32020s, capable of performing high speed matrix multiplication computations, is presented.