BPI Fast Configuration and iMPACT Flash Programming with 7 Series FPGAs
Stephanie Tapp · 2013
Summary This application note describes the 7 series FPGA Byte-wide Peripheral Interface (BPI) configuration mode with synchronous read and the External Master Configuration Clock (EMCCLK) options. Because the BPI configuration mode with synchronous read and EMCCLK provides the fastest configuration time from a direct FPGA interface, it is referred to as BPI Fast Configuration in this document. The BPI Fast Configuration enables high-capacity nonvolatile storage and decreases the configuration time to less than 8% of the legacy BPI configuration with the asynchronous read. The 7 Series FPGAs Configuration User Guide (UG470) [Ref 1] contains details on FPGA configuration. Familiarity with this document is assumed. The hardware setup, file generation, and the tool flow to indirectly program a parallel NOR flash through the 7 series FPGA are described. The Virtex®-7 FPGA and 28F00AG18F parallel NOR flash on the VC707 evaluation board are used to demonstrate the flow with the ISE® Design Suite 14.7. For flash programming examples using Vivado® tools, see the UltraScale FPGA BPI Configuration and Flash Programming Application Note (XAPP1220) [Ref 2].