Brute Force Methodology of Hardware / Software Co-Design
Meghana A. Hasamnis, S. S. Limaye · 2012
Design of embedded systems is becoming increasingly difficult due to the tight constraints on area usage, size, power consumption and performance. In addition to these one more constraint faced in embedded system design is tight time to-market deadlines. Hence, the hardware / software co-design methodology is often used to design embedded systems in order to help reduce the amount of time spent on development. Hardware / Software co-design offers flexibility of design, as number of soft core processors and hardware development platforms are available in the market. In this paper a new hardware / software co-design methodology is proposed. Advanced Encryption Standard (AES) algorithm is under consideration as a case study. Optimized hardware / software co-design is achieved for AES Algorithm using the proposed methodology in terms of speed, area and thermal power dissipation.