Application on the Hardware/Software Co-simulator; Implementation of Multi-stage, Multi-rate 2-D filter
Yukiko Takanishi, Yuichi Nakamura, Takao Nishitani · 2012
A functional expansion of a hardware- software co-simulator, using on PC and an FPGA emulator board, is realized for the purpose of real-time HDTV signal processing. In the proposed co-simulator, the emulation is carried out by using a set of raster scanning data processing, instead of the frame-based processing which is suitable for process- ing block. In addition, a visual verifica- tion approach in terms of processing delay between Simulink blocks is introduced for adjusting the con- nection of these blocks within the emulator.