Cryptographically Enforced Pay-Per-Use Licensing of FPGA Design Intellectual Property
Tom Kean, Edinburgh Uk · 2002
At present FPGA IP vendors cannot determine how many times their design has been programmed into an FPGA by a customer. This has forced them to adopt an up-front charging model where a customer obtains unlimited use of an IP block for a single relatively large payment. This pricing model is fundamentally unsuited to the FPGA market since the basic motivation for using an FPGA rather than an ASIC is to trade off a higher per-unit cost to avoid a large up front NRE payment. This paper suggests upgrading the cryptographic circuitry presently included on FPGAs to prevent bitstream piracy so that it can also support pay-per-use royalty collection on FPGA IP cores and entire FPGA designs.