A Scalable Snoopy Coherence Scheme on Distributed
Tyan-Shu Jou, Richard J. Enbody · 1992
Maintaining data coherence among multiple caches is one of the most important problems in building shared-memory multiprocessors. This problem has been eficiently solved on small-scale systems by using snoopy schemes based on the single-bus-connected architecture. Because of the development of highperformance processors, the bottleneck caused by the shared bus will significantly limit the allowable number of processors. We present a scalable snoopy scheme based on a single-hop-connected multiple-bus topology. To reduce the hardware complexity, each processor will snoop on a dynamically changing subset of the busses. The physically-distributed-logically-shared memory model is chosen to let processors take advantage of local memory accesses for private data.