A Set of Models for Manycore Performance Evaluation through Abstract Interpretation of Timed Configuration Graphs
Jerker Bengtsson, Bertil Svensson · 2008
The programming complexity of increasingly parallel processors calls for new tools that assist programmers in utilising the parallel hardware resources. In this paper we present a set of models that we have developed as a part of a tool for mapping dataflow graphs onto manycores. One of the models captures the essentials of manycores, identified as suitable for signal processing, and which we use as target for our algorithms. As an intermediate representation we introduce timed configuration graphs, which describe the mapping of a model of an application onto a machine model. Moreover, we show how a timed configuration graph can be evaluated using an abstract interpretation to obtain performance feedback. This information can be used by our tool and by the programmer in order to discover improved mappings.