Contribution to Digital System Testing Methods
Marcel Balá · 2010
System-on-chip is an integrated circuit comprising of nu- merous functional cores which can be of various types. Testing of such diverse circuit is very complex problem. Test access to digital cores is ensured by core wrapper ar- chitectures. The paper presents two novel contributions to core test wrappers: (1) the set of optimization tech- niques for parallel interface to provide faster test applica- tion and (2) effective method of delay fault test generation requiring only the simple test wrapper architecture.