FUNTEST : A Functional Automatic Test Pattern Generator for Combinational
Martin Nordenso, E. Arques Ave · 1989
An Automatic Test Pattern Generator (ATPG) for combinational circuits based on a functional description has been developed .The algorithm generates tests based on a set of boolean equations or a higher level where little or no knowledge of the physical structure is required. A functional fault coverage is defined and related to structural fault coverage. SUMMARY The increased drive towards VLSl circuits experienced today necessitates more organized and automatic techniques for test generation.The large number of transistors imbedded in complex VLSl circuits makes gate-level testing difficult,time consuming and expensive. Testability rapidly decreases with the increase in complexity of integrated circuits, not only due to the increased number of transistors, but also because test points no longer are accessible inside the chip. In addition,the reliability of offthe-shelf components can be hard to determine since adequate implementation details of such circuits is rarely available.Thus,the concept of functional testing has received a great deal of attention during the past few years[l-31. Functional testing differs from the traditional gate-level testing in several aspects, rather than individually checking every node in a logic circuit for signal faults using specific fault models (thereby verifying the structure), functional testing attempts to verify the validity of the logic functions. Gate-level testing is obviously implementation dependent and requires a detailed knowledge of the CUT, while functional testing can be independent of circuit implementation. At the present time, no universally accepted definition of functional testing is available. Some of the discussions concentrate on the distinctions between function-oriented testing and gatelevel testing, while others focus on system test (boards) as opposed to parts test (chips)[4-51. The deterministic algorithm introduced here (FUNTEST : FUNctional TESTing) considers the conventional stuck-at fault model in a functional sense.The algorithm generates tests for combinational circuits based on a set of boolean equations or higher functional representations. No