A Review of Different Methods for Matrix Multiplication Based on FPGA
Akshita Mishra, Hemika Yadav, Sarita Rani · 2014
In this paper, we present the design methods and Field Programmable Gate Array (FPGA) implementation of matrix multiplier in image and signal processing applications. This paper gives the detailed review of matrix product implementation on FPGA where area, energy, speed, power dissipation, latency and time efficient methods are compared for different Xilinx families. Here we are also presenting parallel architecture and parameterized system for matrix product used in FPGA. In this way, this literature will help in making performance characterization to implement high performance matrix multiplier on FPGA.