Massive Parallelism on a ChipVLST Aspects Involving Dynamic Logic
Reinhard Posch · 1994
In most cases performance of parallel machmes is proven with special applications that enable for adequate granularity, and thus are able to show the performance. Looking at common machine types, the involved techniques do not solve the problem of fast communication among processing elements. In fact, nearly any of these types is capable of really fine grain granularity. In most real applications ths is not a big problem. But in a few cases this becomes critical. The presented approach shows how to cope with fast communication among processing elements. Thts is done through the use of massive parallelism on a single chp, or on a set of chips. In this case optimum communication speed can be assumed and thus fast processing within a very small area becomes the design goal. This design goal is met in the special case with dynamic logic enabling for a large number of vcry small processing elements. Still this scenario is well suited for parallel computation as regularity is inherent. In many cryptographic applications. especially in public key cryptography [l] [2], manipulation of extremely long integers is of prime importance. To be able to concentrate on the topics directly related to parallelism we focus on long integer manipulation and underlay long integer multiplication and modulus reduction in our special case. The goal In the depicted context it is the goal to design a special purpose machine with massive parallelism on a chip. This seems the most promising way to reach the optimum performance for the addressed set of problems. In section 2 it is dscussed why special purpose machines should be used. Section 3 shows how the goal can be reached. In section 4 &mimic logic is presented and some facets are discussed. Section 5 points at the pros and cons of dynamic logic. The last section gives a short summary.