Modelling and Design of a Low Power Event Processor
Yuan Chen, Fei Xia, Delong Shang, Alex Yakovlev, Mohammad Rastegar Tohid · 2008
Systematic power management techniques have not been a focus of GALS (Globally Asynchronous Locally Synchronous) design although GALS provides an ideal environment for controlling individual IP blocks for better power performance. In this work an event driven coprosessor STEP, which provides an Accumulation & Fire power/latency control for IP blocks in a GALS setting, is modelled and designed. A model-based design (MBD) method was employed in the motivation, specification, design derivation and verification process. The resulting asynchronous STEP architecture will provide fast event handling with low power consumption. 1.