A Combinational Logic Mapper for Actel's Family
Santanu Chattopadhyay, Kumar Dewangan · 2005
This paper presents a technology mapper f or combinational circuits targeting Actel’s logic module. To the best of our knowledge, this is the first such effort reported in the literature. It exploits the module architecture completely to come u p with good mapping solutions. In the absence of similar works, results have been compared with and a ct2 map pers and found t o be encouraging.