Speed Pong Video Game Implemented in VHDL
James Gurunlian, Clarence Ngai · 2005
This report will outline the design of the game Speed Pong. The game was designed in the VHDL hardware description language and a licensed copy of ALTERA MAX+plus II was used to compile the design. The code was downloaded onto the Altera University Program 1 (UP 1) board using the EPF10K70RC240-4 chip device in the FLEX10K device family. The report will begin with an overview of the game concept including playing instructions. The design and building blocks will be discussed, outlining the relationships between processes, inputs, and outputs. Details of the implementation in VHDL will also be discussed, as well as experimental results upon simulation. The report will continue with the challenges faced with regards to design, coding, simulation, and project management. To conclude, recommendations for future work on the game will be provided.