Comp act A MICRO-PROCESSOR INTERFACED 1 MBIT BUBBLE MEMORY
Shigeru Yoshizawa, M. Sugie, Y. Kita, Naoya Yamaguchi, Kyosuke Mayama, Atsushi Asano, Hirokazu NISHIDA, Fumihiko Ishida, Y. Sugita, S. Kurokawa · 1979
solid-state read-write memories with non-volatility are much desired for micro-processor applications.1) Recently, we have realized a very compact and convenient lait bubble memory board, using newly developed controller LSI(BMC: Bubble Memory Controller) and high density 256 kbit bubble memory chips(8p period) . The memory board is only 18cm X 15cm size and activated by a single power source of +5V. An outstanding feature of this memory is a perfect protection of memory contents against power supply accidents (+5V, open or short) . This protection is realized using a new method by BMC and a peripheral circuit on the board. Another feature is a new automatic handling of defect loops in the bubble memory chips. A defect loop map is stored in