A Descriptive Analysis of TDMA Ethernet Switch for Dynamic Real-Time Communication: Limitations & Extensions
Asif Uddin Khan, Shohel Ahmed, Abbas Morshed · 2013
The implementation of read time communication over existing Ethernet architecture is a subject of great interest. Various methods have been proposed to achieve this goal. Thus the concepts of a scalable architecture that interconnects multiple instances of the Network Code Processor (NCP), which is an Application-Specific Instruction Set Processor coordinates access to the shared medium by executing Time Division Multiple Access (TDMA) based schedules on each node (ASIP) that running concurrently on a single FPGA fabric emerges. By using programmable TDMA schedules to coordinate passing data between the core instances, the system provides a dedicated hard real-time switching service on top of Ethernet. In this paper we have discussed the possible limitations of this architecture and how to improve this work for better performance.