Formal Verification of Ladder Logic
Karim Kanso · 2008
This project studied whether a digital interlocking which had been programmed with ladder logic (Boolean program) would obey generic safety properties. This was carried out by translating the ladder logic into an alternate representation and applying various techniques to allow specification of safety properties. Finally, a proof engine was used to formally verify if these properties were fulfilled and if they are not, then human readable documentation would be generated.